A Level Computer Science 9618, topic 4.3

Bit manipulation: past paper questions

15 Cambridge A Level Computer Science 9618 questions on Bit manipulation (4.3) from 14 papers, 2023 to 2026. Open the paper or try a question free.

Practising builds a set from this topic, free with an account. One question opens straight away, with no account.

Questions
15
Papers
14
Years
2023 to 2026
Total marks
112
Average per question
7.5 marks
Largest question
11 marks

By type: Structured 15

How hard the questions are

  • Recall2
  • Apply7
  • Analyse6
  • Not banded0

Derived from the command word Cambridge prints in each question, banded by a fixed table beside the syllabus's own definitions. A question printing no command word is unbanded: unknown, not middling.

Command words

  • completeApply8 questions

    add information to an incomplete diagram or table

  • writeRecall5 questions

    write an answer in a specific way

  • explainAnalyse4 questions

    set out purposes or reasons / make the relationships between things clear / say why and/or how and support with relevant evidence

  • convertApply3 questions
  • describeApply3 questions

    state the points of a topic / give characteristics and main features

  • identifyRecall3 questions

    name/select/recognise

  • showApply3 questions
  • compareAnalyse2 questions

    identify/comment on similarities and/or differences

  • stateRecall2 questions

    express in clear terms

  • giveRecall1 question

    produce an answer from a given source or recall/memory

Where the questions come from

By year

  • 20262
  • 20255
  • 20246
  • 20232

By session

  • May/June9
  • Oct/Nov6

By paper

  • Paper 115

Questions on this topic

Showing 14 of 15, spread across the years. Open one to write your answer and have it marked.

  • Question 3May/June 2026, paper 11Structured9 marks

    The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX). instruction | explanation LDM #n | Immediate addressing.

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  • Question 4Oct/Nov 2025, paper 11Structured4 marks

    The table shows part of the instruction set for a processor. The processor has one register, the Accumulator (ACC).

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  • Question 8Oct/Nov 2024, paper 12Structured11 marks

    The following table shows part of the instruction set for a processor. The processor has two registers, the Accumulator (ACC) and the Index Register (IX). Instruction | Explanation Opcode | Operand | LDM | #n | Immediate addressing.

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  • Question 8Oct/Nov 2023, paper 11Structured10 marksHas a diagram

    Identify the purpose of the first pass of a two-pass assembler.

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  • Question 7May/June 2026, paper 13Structured9 marks

    A program is written in assembly language. Complete the table by writing the name of each mode of addressing.

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  • Question 2Oct/Nov 2025, paper 13Structured6 marks

    Data in a computer system is represented in binary. Put one tick (✓) in each row to identify the minimum number of bits used to store each example of data.

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  • Question 7Oct/Nov 2024, paper 13Structured6 marks

    The following table shows part of the instruction set for a processor. The processor has two registers, the Accumulator (ACC) and the Index Register (IX). | Instruction | | Explanation | |---|---|---| | Opcode | Operand | | | LDM | #n | Immediate addressing.

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  • Question 4May/June 2023, paper 12Structured6 marks

    Data in a computer is stored in binary form. State the number of unique binary values that can be represented in 16 bits.

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  • Question 8May/June 2025, paper 11Structured7 marks

    The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX). Trace the program currently in memory using the following trace table.

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  • Question 8Oct/Nov 2024, paper 13Structured6 marks

    Convert the hexadecimal number 1FAB into denary. Working Denary value

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  • Question 7May/June 2025, paper 12Structured8 marks

    The following table shows part of the instruction set for a processor. The processor has one register: the Accumulator (ACC). Instruction | Explanation Opcode | Operand | LDD | <address> | Direct addressing.

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  • Question 4May/June 2024, paper 11Structured7 marks

    The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX).

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  • Question 5May/June 2024, paper 12Structured7 marks

    The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX).

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  • Question 3May/June 2024, paper 13Structured7 marks

    The following table shows part of the instruction set for a processor. The processor has two registers: the Accumulator (ACC) and an Index Register (IX). Instruction Opcode | Operand | Explanation LDM | #n | Immediate addressing.

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